In general, each of unit pixels includes a photodiode for generating charges corresponding to an incident image signal, and an image signal conversion circuit for converting the charges generated by the photodiode into a corresponding electrical signal.
FIG. 1 is a circuit diagram of a unit pixel.
Referring to FIG. 1, the unit pixel includes a photodiode PD, a transfer transistor M1, a reset transistor M2, a conversion transistor M3, and a selection transistor M4. Here, the image signal conversion circuit generally includes the transfer transistor M1 for transferring charges generated by the photodiodes PD in response to a transfer control signal Tx to a floating diffusion area FD, the reset transistor M2 for resetting the floating diffusion area FD in response to a reset control signal Rx, the conversion transistor M3 for generating an electrical signal corresponding to the charges accumulated into the floating diffusion area FD, and the selection transistor M4 for outputting the electrical signal converted by the conversion transistor M3 in response to a selection control signal Sx.
Conventionally, the unit pixels are formed in the same wafer. However, in order to increase an area of the photodiode included in the unit pixel, the unit pixel is divided into two parts so as to be formed in different wafers. As described above, a separation type unit pixel is proposed. The separation type unit pixel is implemented so that pixel chips separated to be formed in two different wafers are electrically connected to be used. In this case, the photodiode and the transfer transistor are formed on a wafer and the remaining transistors excluding the transfer transistor from the transistors included in the image signal conversion circuit are formed on the other wafer.
Referring to FIG. 1, the photodiode PD and the transfer transistor M1 illustrated on the left side with respect to a dotted line may be formed on the wafer, and the remaining reset transistor M2, the conversion transistor M3, and the selection transistor M4 illustrated on the right side may be formed on the other wafer.
FIG. 2 is a cross-sectional view of a unit pixel of separation type unit pixels, on which a photodiode and a transfer transistor are formed.
Referring to FIG. 2, the unit pixel 200 is formed on a P− epilayer 21 formed by performing epitaxial growth on a P++ substrate 20. Here, it means that P++ has higher impurity concentration than P−.
The unit pixels are insulated from each other by shallow trench insulators (STIs) 22. The photodiode is constructed with junctions of N-types 25 and 28 and P-types 28 and 29, respectively to generate charges corresponding to incident light energy. The generated charges are transferred to floating diffusion areas 27 and 30 by transfer transistors operating in response to transfer control signals T/G1 and T/G2 applied to gate terminals 23-1 and 23-2, respectively. Spacers 24 are provided at both sides of the gate areas 23-1 and 23-2.
Since structures and operations of the two unit pixels are the same, hereinafter, only the unit pixel illustrated on the left side is described. The junction of the N area 25 of the photodiode and the P-type epitaxial substrate 21 is a PN junction, and therefore at the PN junction portion at which the two areas 21 and 25 contact with each other, a depletion area (covered by the outside dotted line) having a predetermined width is formed naturally. In general, since the concentration of impurities injected into the N area 25 is greater than the concentration of impurities injected into the P-type epitaxial substrate 21, in a case where any bias is not applied to the PN junction, the depletion area may be extended wider in a direction from the N-type area 25 to the P-type epitaxial substrate 21.
In general, DC bias having a low voltage level is applied to the P-type epitaxial substrate 21. Therefore, due to the DC bias applied to the epitaxial substrate 21, a width of the depletion area and the P-type epitaxial substrate 21 further increases. In the depletion area where charges do not exist, an electric field including a predetermined electric field due to fixed ionized charges and an electric field due to the DC bias exists.
When light having predetermined energy is incident from a lower portion of the conventional unit pixel illustrated in FIG. 2 into the photodiode, the photodiode generates a corresponding electron-hole pair. The electron-hole pairs may be recombined. However, the electron-hole pairs may be moved to the P area 26 or the N area 25 by diffusion and drift.
When the transfer transistor 23-1 is turned off, a voltage profile of the photodiode is illustrated as a dotted contour map. A dotted line circle closest to the center of the contour map has the highest voltage level, and outer dotted line circles have lower voltage levels. Therefore, in correspondence with an image signal (light) incident from a lower portion of the unit pixel, charges generated in the substrate 21 and the photodiode are accumulated into the center portion of concentric circles.
When the transfer transistor 23-1 is turned on, the charges accumulated into the center portion of the concentric circles are transferred to a floating diffusion area along a surface (a two-way arrow illustrated as a thick line) of the transfer transistor 23-1. Here, since the center portion of the concentric circles is far from the surface on which a channel is formed, a path for transferring the charges accumulated into the concentric circles to the floating diffusion area is lengthened. Therefore, there is a problem in that image sensitivity of the unit pixels, that is, sensitivity of the image sensor decreases.